A low-area decimation filter for ultra-high speed 1-bit ∑Δ A/D converters

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 77-80

  Muhammad, K ^a   Elahi, I ^a   Jung, T ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL FILTERS; TRANSCEIVERS; WIRELESS TELECOMMUNICATION SYSTEMS;

DECIMATION FILTERS; POLYPHASE STRUCTURES;

ANALOG TO DIGITAL CONVERSION;

EID: 33847169954     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568612     Document Type: Conference Paper

References (7)

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4. Y. Gao, J. Tenhunen and H. Tenhunen, "A fifth-order comb decimation filter for multi-standard transceiver applications", Proc. IEEE Int. Symp. on Circuits and systems (ISCAS), pp. III-89-III-92, May 2000.
5. E. B. Hogenauer, "An economical class of digital filters for decimation and interpolation," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-29, pp. 155-162, Apr. 1981.
6. K. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, John Wiley & Sons, 1999.
7. N FIR filters," IEEE Trans. Circuits andSystems-I: Fundamental Theory and Applications, vol. 50, no. 4, pp. 523-529, Apr. 2003.