A low phase noise 2 GHz VCO using 0.13 μm CMOS process

Asia-Pacific Microwave Conference Proceedings, APMC

Volumn 4, Issue , 2005, Pages

  Choi, Jinsung ^b   Ryu, Seonghan ^c   Kim, Huijung ^b   Kim, Bumman ^a,b  

^a IEEE

^b Pohang University of Science and Technology (POSTECH)   (South Korea)

^c SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; PHASE MEASUREMENT; SEMICONDUCTING SILICON; VARIABLE FREQUENCY OSCILLATORS; VOLTAGE CONTROL;

CONVENTIONAL VCO; LOW PHASE NOISE; OFFSET FREQUENCIES;

SPURIOUS SIGNAL NOISE;

EID: 33847167609     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APMC.2005.1606779     Document Type: Conference Paper

References (8)

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8. P. Adreanj and H. Sjoland, "A 2.2 GHz CMOS VCO with inductive degeneration noise suppression," in Proc. IEEE Custom Integrated Circuit Conf, pp.197-200, May 2001.