Exploiting processing locality through paging configurations in multitasked reconfigurable systems

20th International Parallel and Distributed Processing Symposium, IPDPS 2006

Volumn 2006, Issue , 2006, Pages

  Taher, Mohamed ^a   El Ghazawi, Tarek ^a  

^a GEORGE WASHINGTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SYSTEMS; DATA PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MATHEMATICAL MODELS; SOFTWARE ENGINEERING;

HARDWARE LIBRARY; MALLEABLE COPROCESSORS; MULTITASKED RECONFIGURABLE SYSTEMS; RECONFIGURABLE COMPUTER SYSTEMS;

MULTITASKING;

EID: 33847106089     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2006.1639459     Document Type: Conference Paper

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