An FPGA arithmetic logic unit for computing scalar multiplication using the half-and-add method

Proceedings - ReConFig 2005: 2005 International Conference on Reconfigurable Computing and FPGAs

Volumn 2005, Issue , 2005, Pages

  Rodríguez, Sabel Mercuric Hernández ^a   Rodríguez Henríquez, Francisco ^a  

^a NONE

Author keywords

Elliptic curve; Point halving; Reconfigurable hardware; Scalar multiplication

Indexed keywords

COMPUTATION THEORY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

ELLIPTIC CURVE; POINT HALVING; RECONFIGURABLE HARDWARE; SCALAR MULTIPLICATION;

FORMAL LOGIC;

EID: 33846980447     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RECONFIG.2005.8     Document Type: Conference Paper

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