VHDL core for 1024-point radix-4 FFT computation

Proceedings - ReConFig 2005: 2005 International Conference on Reconfigurable Computing and FPGAs

Volumn 2005, Issue , 2005, Pages

  Vite Frias, Jose Alberto ^a   Romero Troncoso, Rene De Jesus ^a   Ordaz Moreno, Alejandro ^a  

^a UNIVERSITY OF GUANAJUATO   (Mexico)

Author keywords

FFT; HSP; IP cores; VHDL

Indexed keywords

IP CORES; PERFORMANCE EVALUATION; TIME PERFORMANCE ANALYSIS; VHDL CORE;

COMPUTER HARDWARE; COST EFFECTIVENESS; DATA ACQUISITION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; PERSONAL COMPUTERS; SIGNAL PROCESSING; SPECTRUM ANALYSIS;

FAST FOURIER TRANSFORMS;

EID: 33846978418     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RECONFIG.2005.36     Document Type: Conference Paper

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9. Xilinx® Logic core™, Fast Fourier Transform V3.1, Xilinx® 2004.