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Volumn 2005, Issue , 2005, Pages 652-656

An efficient wavelet image encoder for FPGA-based designs

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE COMPRESSION; RANDOM ACCESS STORAGE; WAVELET TRANSFORMS;

EID: 33846942219     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2005.1579946     Document Type: Conference Paper
Times cited : (6)

References (14)
  • 2
    • 0027798110 scopus 로고
    • Embedded image coding using zerotrees of wavelet coefficients
    • Pag, Dec
    • J.M. Shapiro, "Embedded image coding using zerotrees of wavelet coefficients", IEEE Transactions on Signal Processing, Vol.41, no12, Pag. 3445-3462, Dec. 1993.
    • (1993) IEEE Transactions on Signal Processing , vol.41 , Issue.NO12 , pp. 3445-3462
    • Shapiro, J.M.1
  • 3
    • 0030173121 scopus 로고    scopus 로고
    • A new, fast, and efficient image codec based on set partitioning in hierarchical trees
    • Pag, June
    • A. Said, W.A. Pearlman, "A new, fast, and efficient image codec based on set partitioning in hierarchical trees", IEEE Transactions on Circuits and Systems for Video Technology, Vol.6, no3, Pag. 243-250, June 1996.
    • (1996) IEEE Transactions on Circuits and Systems for Video Technology , vol.6 , Issue.NO3 , pp. 243-250
    • Said, A.1    Pearlman, W.A.2
  • 4
    • 0034229499 scopus 로고    scopus 로고
    • High performance scalable image compression with EBCOT
    • Pag, July
    • D. Taubman, "High performance scalable image compression with EBCOT", IEEE Transactions on Image Processing, Vol.9, no7, Pag. 1158-1170, July 2000.
    • (2000) IEEE Transactions on Image Processing , vol.9 , Issue.NO7 , pp. 1158-1170
    • Taubman, D.1
  • 5
    • 0036878147 scopus 로고    scopus 로고
    • High speed lattice based VLSI architecture of 2D discrete wavelet transform for real-time video signal processing
    • Nov
    • T. Park, S. Jun, "High speed lattice based VLSI architecture of 2D discrete wavelet transform for real-time video signal processing", IEEE Transactions on Consumer Electronics, Vol.48 , Issue 4, Nov. 2002.
    • (2002) IEEE Transactions on Consumer Electronics , vol.48 , Issue.4
    • Park, T.1    Jun, S.2
  • 9
    • 0033716238 scopus 로고    scopus 로고
    • A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing
    • Pag, 28-31 May
    • L. Ang, H. N. Cheung, K. Eshraghian, "A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing", Proc. of The IEEE Int. Symposium on Circuits and Systems ISCAS 2000, Vol.1, Pag. 291-294, 28-31 May 2000.
    • (2000) Proc. of The IEEE Int. Symposium on Circuits and Systems ISCAS 2000 , vol.1 , pp. 291-294
    • Ang, L.1    Cheung, H.N.2    Eshraghian, K.3
  • 12
    • 67149142101 scopus 로고    scopus 로고
    • available at
    • Memec-Design, "Virtex II MB", available at www.insight.na. memec.com/Memeu/iplanel/link1
    • Virtex II MB
    • Memec-Design1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.