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Volumn 54, Issue 1, 2007, Pages 166-169

Modeling of surrounding gate MOSFETs with bulk trap states

Author keywords

Bulk traps; Recrystallized silicon; Surrounding gate transistor

Indexed keywords

APPROXIMATION THEORY; COMPUTER SIMULATION; ELECTRON TRAPS; GATES (TRANSISTOR); HOLE TRAPS; MATHEMATICAL MODELS; POISSON EQUATION; SEMICONDUCTING SILICON; THRESHOLD VOLTAGE;

EID: 33846035214     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.887521     Document Type: Article
Times cited : (24)

References (8)
  • 1
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    • "Numerical analysis of a cylindrical thin-pillar transistor (CYNTHIA)"
    • Aug
    • S. Miyano, M. Hirose, and F. Masuoka, "Numerical analysis of a cylindrical thin-pillar transistor (CYNTHIA)," IEEE Trans. Electron Devices, vol. 39, no. 8, pp. 1876-1881, Aug. 1992.
    • (1992) IEEE Trans. Electron Devices , vol.39 , Issue.8 , pp. 1876-1881
    • Miyano, S.1    Hirose, M.2    Masuoka, F.3
  • 5
    • 34249881885 scopus 로고    scopus 로고
    • "Mechanism of solid phase crystallization of pre-patterned nano scale α-Si pillars"
    • to be published
    • H.-J. Cho, B. J. Greene, J. L. Hoyt, and J. D. Plummer, "Mechanism of solid phase crystallization of pre-patterned nano scale α-Si pillars," J. Appl. Phys., to be published.
    • J. Appl. Phys.
    • Cho, H.-J.1    Greene, B.J.2    Hoyt, J.L.3    Plummer, J.D.4
  • 6
    • 1442296225 scopus 로고    scopus 로고
    • "An analytical moderate inversion drain current model for polycrystalline silicon thin-film transistors considering deep and tail states in the grain boundary"
    • Feb
    • S. S. Chen and J. B. Kuo, "An analytical moderate inversion drain current model for polycrystalline silicon thin-film transistors considering deep and tail states in the grain boundary," J. Appl. Phys., vol. 79, no. 4, pp. 1961-1967, Feb. 1996.
    • (1996) J. Appl. Phys. , vol.79 , Issue.4 , pp. 1961-1967
    • Chen, S.S.1    Kuo, J.B.2
  • 7
    • 0025377450 scopus 로고
    • "A new poly-silicon MOS transistor model which includes the effects of bulk trap states in grain boundary regions"
    • H. Hayama and W. I. Milne, "A new poly-silicon MOS transistor model which includes the effects of bulk trap states in grain boundary regions," Solid State Electron., vol. 33, no. 2, pp. 279-286, 1990.
    • (1990) Solid State Electron. , vol.33 , Issue.2 , pp. 279-286
    • Hayama, H.1    Milne, W.I.2
  • 8
    • 23344447576 scopus 로고    scopus 로고
    • "Explicit continuous model for long-channel undoped surrounding gate MOSFETs"
    • Aug
    • B. Iniguez, D. Jimenez, J. Roig, H. Hamid, L. Marsal, and J. Pallares, "Explicit continuous model for long-channel undoped surrounding gate MOSFETs," IEEE Trans. Electron Devices, vol. 52, no. 8, pp. 1868-1873, Aug. 2005.
    • (2005) IEEE Trans. Electron Devices , vol.52 , Issue.8 , pp. 1868-1873
    • Iniguez, B.1    Jimenez, D.2    Roig, J.3    Hamid, H.4    Marsal, L.5    Pallares, J.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.