An efficient simultaneous switching noise analysis of high density multi-layer packages and PCBs considering the power and ground planes

ICVC 1999 - 6th International Conference on VLSI and CAD

Volumn , Issue , 1999, Pages 65-68

  Choi, Joon Ho ^a   Hong, Young Seok ^a   Ko, Chang Woo ^a   Kim, Yeong Gil ^a   Kim, Taek Soo ^a   Kong, Jeong Taek ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33845909106     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVC.1999.820825     Document Type: Conference Paper

References (6)

1. H.B. Bakoglu, "Circuits, Interconnections, and Packaging for VLSI," Addison-Wesley Publ. Comp., Ch. 6.2, pp. 239-244, 1990.
2. Frank Y. Yuan "Electromagnetic Modeling and Signal Integrity Simulation of Power/Ground Networks in High Speed Digital Packages and Printed Circuit Boards," 35th DAC, pp. 427-432, 1998.
3. P.A. Brennan, N. Raver, A.E. Ruehli, "Tree-Dimensional Inductance Computations with Partial Element Equivalent Circuits," IBM J. RES. Develop. Vol 23, No. 6, Nov. 1979.
4. Pacific Numerix Co., "PCB Signal Integrity" manual, 1999.
5. J.H. Choi, K.H. Kim, T.S. Kim, J.T. Kong, and S.H. Lee, "A Simultaneous Switching Noise Analysis System and It's Application to High Speed Memory Module Design," 5th ICVC, pp. 121-123, 1997.
6. J.H. Choi, K.H. Kim, J.B. LEE, T.S. Kim, J.T. Kong, and S.H. Lee, "A Simultaneous Switching Noise Analysis of a High Speed Memory Module Including the Test Environment BE System-level Models," EPEP, pp. 109-112, 1997.