메뉴 건너뛰기




Volumn 2228, Issue , 2001, Pages 192-203

Weld: A multithreading technique towards latency-tolerant VLIW processors

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; MULTITASKING; PROGRAM COMPILERS; WELDS;

EID: 33845887784     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-45307-5_17     Document Type: Conference Paper
Times cited : (12)

References (15)
  • 6
    • 0346035644 scopus 로고
    • A Benchmark Evaluation of a Multithreaded RISC Processor Architecture
    • Aug
    • G. Prasadh and C. Wu, "A Benchmark Evaluation of a Multithreaded RISC Processor Architecture," in Proc. of Int'l Conf. on Parallel Processing, Aug. 1991.
    • (1991) Proc. of Int'l Conf. on Parallel Processing
    • Prasadh, G.1    Wu, C.2
  • 7
    • 0026865602 scopus 로고
    • Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism
    • Australia, May
    • S. W. Keckler and W. J. Dally, "Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism," in Proc. 19th Ann. Int'l Symp. Computer Architecture, Australia, May 1992.
    • (1992) Proc. 19th Ann. Int'l Symp. Computer Architecture
    • Keckler, S.W.1    Dally, W.J.2
  • 10
    • 0038244931 scopus 로고    scopus 로고
    • Treegion Scheduling for VLIW Processors
    • Dept. of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-7911, July
    • W. A. Havanki, "Treegion Scheduling for VLIW Processors", Master's Thesis, Dept. of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-7911, July 1997.
    • (1997) Master's Thesis
    • Havanki, W.A.1
  • 13
    • 0024013595 scopus 로고
    • Implementing Precise Interrupts in Pipelined Processors
    • May
    • J. E. Smith and A. R. Pleszkun, "Implementing Precise Interrupts in Pipelined Processors", in IEEE Trans. on Computers, Vol. 37, NO. 5, May 1988.
    • (1988) IEEE Trans. on Computers , vol.37 , Issue.5
    • Smith, J.E.1    Pleszkun, A.R.2
  • 14
    • 0026865603 scopus 로고
    • The Expandable Split Window Paradigm for Exploiting Fine-grain Parallelism
    • Gold Coast, Australia, May
    • M. Franklin and G. S. Sohi, "The Expandable Split Window Paradigm for Exploiting Fine-grain Parallelism", Proc. 19th Ann. Int'l Symp. Computer Architecture, Gold Coast, Australia, May 1992.
    • (1992) Proc. 19th Ann. Int'l Symp. Computer Architecture
    • Franklin, M.1    Sohi, G.S.2
  • 15
    • 0007997616 scopus 로고    scopus 로고
    • ARB: A Hardware Mechanism for Dynamic Reordering of Memory References
    • May
    • M. Franklin and G. S. Sohi, "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References", in IEEE Trans. on Computers, May 1996.
    • (1996) IEEE Trans. on Computers
    • Franklin, M.1    Sohi, G.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.