10 GHz VCO for 0.13μm CMOS sonet CDR

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn 2006, Issue , 2006, Pages 345-348

  Titus, Ward S ^a   Kenney, John G ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

Amplitude of oscillation; CMOS integrated circuits; LC oscillator; Varactors; VCO's

Indexed keywords

BUFFER CIRCUITS; ENERGY UTILIZATION; JITTER; LINEARIZATION; OSCILLATORS (ELECTRONIC); VARACTORS;

AMPLITUDE OF OSCILLATION; RADIO FREQUENCY INTEGRATED CIRCUITS; THICK OXIDE TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 33845878872     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. D. Dalton, et al., "A 12.5-Mb/s to 2.7-Gb/s continuous-rate CDR with automatic frequency acquisition and data-rate readback," IEEE J. of Solid-State Circuits., vol. 40, no. 12, pp. 2713-2725, December 2005.
2. J. Kenney, D. Dalton, M. Eskiyerli, E. Evans, B. Hilton, D. Hitchcox, T. Kwok, D. Mulcahy, C. McQuilkin, V. Reddy, S. Selvanayagam, P. Shepherd, W. Titus and L. DeVito, "A 9.95 to 11.1 Gb/s XFP Transceiver in 0.13μm CMOS," to be presented at IEEE ISSCC, February 2006.
3. L. DeVito, "A Versatile Clock Recovery Architecture and Monolithic Implementation," in Monolitich Plase-Locked Loops and Cock Recovery Circuits, B. Razavi, Ed. Pistacaway, NJ: IEEE Press, 1996, pp. 405-420.
4. m LC VCOs," IEEE J. of Solid-State Circuits., vol. 38, no. 8, pp.1325-1332, August 2003.