A 5-GHz 108-Mb/s 2×2 MIMO transceiver RFIC with fully integrated 20.5-dBm P 1dB power amplifiers in 90-nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 41, Issue 12, 2006, Pages 2746-2755

  Palaskas, Yorgos ^a,b   Ravi, Ashoke ^a,b   Pellerano, Stefano ^a,b   Carlton, Brent R ^b   Elmala, Mostafa A ^a,b   Bishop, Ralph ^b   Banerjee, Gaurab ^a,b   Nicholls, Rich B ^b,c   Ling, Stanley K ^b   Dinur, Nati ^d   Taylor, Stewart S ^a,b   Soumyanath, K ^a,b  

^a IEEE   (United States)

^b INTEL CORPORATION   (United States)

^c Tektronix   (United States)

^d INTEL CORPORATION   (Israel)

Author keywords

Crosstalk; MIMO; RFIC; Spatial multiplexing; Wireless LAN (WLAN)

Indexed keywords

DATA RATE; MULTI INPUT MULTI OUTPUT (MIMO); RFIC; SPATIAL MULTIPLEXING; WIRELESS LAN (WLAN);

ANTENNA ARRAYS; CROSSTALK; DATA TRANSFER; INPUT OUTPUT PROGRAMS; LOCAL AREA NETWORKS; MULTIPLEXING; POWER AMPLIFIERS; TRANSCEIVERS;

CMOS INTEGRATED CIRCUITS;

EID: 33845642998     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.884795     Document Type: Conference Paper

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