Intelligent systems and formal methods in software engineering

IEEE Intelligent Systems

Volumn 21, Issue 6, 2006, Pages 71-81

  Beckert, Bernhard ^a   Hähnle, Reiner ^a,h   Smith, Douglas R ^b,i   Green, Cordell ^b   Ranise, Silvio ^c   Tinelli, Cesare ^d,j   Ball, Thomas ^e   Rajamani, Sriram K ^e,k   Hoare, Tony ^f,g  

^a Institut für Integrierte Naturwissenschaften   (Germany)

^b KESTREL INSTITUTE   (United States)

^c INRIA   (France)

^d UNIVERSITY OF IOWA   (United States)

^e MICROSOFT RESEARCH   (United States)

^f MICROSOFT RESEARCH   (United Kingdom)

^g UNIVERSITY OF OXFORD   (United Kingdom)

^h CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

ⁱ Kestrel Technology LLC   (United States)

^j The University of Iowa   (United States)

^k MICROSOFT RESEARCH INDIA   (India)

more..

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER VIRUSES; ERROR ANALYSIS; FORMAL LOGIC; INTELLIGENT AGENTS; RISK ASSESSMENT;

INTELLIGENT SYSTEMS; PROGRAM VERIFIERS; SCIENTIFIC RISKS; SOFTWARE ERRORS;

SOFTWARE ENGINEERING;

EID: 33845581982     PISSN: 15411672     EISSN: None     Source Type: Journal    
DOI: 10.1109/MIS.2006.117     Document Type: Review

References (15)

1. J.C. King, "A Program Verifier," PhD thesis, Carnegie Inst. of Technology, 1969.
2. M. Kaufmann, P. Manolios, and J Strother Moore, Computer-Aided Reasoning: An Approach, Kluwer Academic, 2000.
3. P. Rümmer, "Generating Counterexamples for Java Dynamic Logic," Proc. CADE-20 Workshop Disproving, 2005, pp. 32-44; www.cs.chalmers.se/~ahrendt/cade20-ws-disproving/proceedings.pdf.
4. A.D. Brucker and B. Wolff, "Interactive Testing with HOLTestGen," Proc. Workshop on Formal Aspects of Testing (FATES 05), LNCS 3997, Springer, 2005, pp. 87-102.
5. B. Beckert, R. Hähnle, and P. Schmitt, eds., Verification of Object-Oriented Software: The KeY Approach, LNCS 4334, Springer, 2006.
6. D.R. Smith, "KIDS: A Semiautomatic Program Development System," IEEE Trans. Software Eng., vol. 16, no. 9, 1990, pp. 1024-1043.
7. M. Becker, L. Gilham, and D.R. Smith, Planware II: Synthesis of Schedulers for Complex Resource Systems, tech. report, Kestrel Technology, 2003.
8. A. Coglio, "Toward Automatic Generation of Provably Correct Java Card Applets," Proc. 5th ECOOP Workshop Formal Techniques for Java-like Programs, 2003; ftp://ftp.kestrel.edu/pub/papers/coglio/ftjp03.pdf.
9. A. Datta et al., "A Derivation System for Security Protocols and Its Logical Formalization," Proc. 16th IEEE Computer Security Foundations Workshop (CSFW 03), IEEE CS Press, 2003, pp. 109-125.
10. O. Strichman, S.A. Seshia, and R.E. Bryant, "Deciding Separation Formulas with SAT," Proc. 14th Int'l Conf. Computer Aided Verification (CAV 02), LNCS 2404, Springer, 2002, pp. 209-222.
11. R. Nieuwenhuis, A. Oliveras, and C. Tinelli, "Abstract DPLL and Abstract DPLL Modulo Theories," Proc. 11th Int'l Conf. Logic for Programming, Artificial Intelligence, and Reasoning (LPAR 04), LNCS 3452, Springer, 2005, pp. 36-50.
12. G. Nelson and D.C. Oppen, "Simplification by Cooperating Decision Procedures," ACM Trans. Programming Languages and Systems, vol. 1, no. 2, 1979, pp. 245-257.
13. A. Armando, S. Ranise, and M. Rusinowitch, "A Rewriting Approach to Satisfiability Procedures," Information and Computation, June 2003, pp. 140-164.
14. T. Ball et al., "Thorough Static Analysis of Device Drivers," Proc. European Systems Conf. (EuroSys 06), 2006, pp. 73-85.
15. M.M. Swift et al., "Recovering Device Drivers," Proc. 6th USENIX Symp. Operating Systems Design and Implementation (OSDI 04), USENIX, 2004, pp. 1-16.