Critical sections and producer/consumer queues in weak memory systems

3rd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 1997

Volumn , Issue , 1997, Pages 56-63

  Higham, L ^a   Kawash, J ^a  

^a UNIVERSITY OF CALGARY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY ARCHITECTURE; NETWORK ARCHITECTURE;

CRITICAL SECTIONS; MEMORY ACCESS; MEMORY CONSISTENCY MODELS; MEMORY SYSTEMS; MUTUAL EXCLUSIONS; ORDERING CONSTRAINTS;

PARALLEL ARCHITECTURES;

EID: 33845205862     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPAN.1997.645055     Document Type: Conference Paper

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