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Volumn 3, Issue , 2006, Pages 831-834

On Idlow with emphasis on speculative SPICE modeling

Author keywords

Alpha power law model; Compact model; Idlow; SPICE

Indexed keywords

DATA ACQUISITION; ELECTRIC CURRENTS; ELECTRIC INSULATORS; SEMICONDUCTOR INSULATOR BOUNDARIES; SILICON; THRESHOLD VOLTAGE; VANADIUM;

EID: 33845186855     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (9)
  • 1
    • 0036923355 scopus 로고    scopus 로고
    • The effective drive current in CMOS inverters
    • M. H. Na, E. J. Nowak, W. Haensch, and J. Cai, "The effective drive current in CMOS inverters," Proc. IEEE IEDM, 2002, pp. 121-124.
    • (2002) Proc. IEEE IEDM , pp. 121-124
    • Na, M.H.1    Nowak, E.J.2    Haensch, W.3    Cai, J.4
  • 2
    • 0025415048 scopus 로고
    • Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
    • Apr.
    • T. Sukurai and A. R. Newton, "Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas," IEEE Journal of Solid-State Circuits, vol.25, no.2, pp. 584-594, Apr. 1990.
    • (1990) IEEE Journal of Solid-state Circuits , vol.25 , Issue.2 , pp. 584-594
    • Sukurai, T.1    Newton, A.R.2
  • 6
    • 33845196870 scopus 로고    scopus 로고
    • University of California, Berkeley
    • BSIMPD User's Manual, University of California, Berkeley.
    • BSIMPD User's Manual
  • 7
    • 0029291056 scopus 로고
    • Measurement of I-V curves of silicon-on-insulator (SOI) MOSFET's without self-heating
    • Apr.
    • K. A. Jenkins and J. Y.-C. Sun, "Measurement of I-V curves of silicon-on-insulator (SOI) MOSFET's without self-heating," IEEE Electron Device Letters, vol.16, no.4, pp.145-147, Apr. 1995.
    • (1995) IEEE Electron Device Letters , vol.16 , Issue.4 , pp. 145-147
    • Jenkins, K.A.1    Sun, J.Y.-C.2
  • 9
    • 33847287986 scopus 로고    scopus 로고
    • Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
    • M. Horstmann, et al., "Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies," Proc. IEEE IEDM, 2005, pp.243-246.
    • (2005) Proc. IEEE IEDM , pp. 243-246
    • Horstmann, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.