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Volumn 2005, Issue , 2005, Pages 844-851

Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; GRAPH THEORY; LARGE SCALE SYSTEMS; PROBABILITY; STATISTICAL METHODS;

EID: 33751398442     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560180     Document Type: Conference Paper
Times cited : (38)

References (16)
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  • 2
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  • 3
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  • 4
    • 0036049629 scopus 로고    scopus 로고
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  • 5
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    • Statistical timing for parametric yield prediction of digital integrated circuits
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  • 7
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    • Statistical timing analysis using bounds and selective enumeration
    • Sep.
    • A. Agarwal, V. Zolotov and D. Blaauw, "Statistical timing analysis using bounds and selective enumeration," IEEE Trans. CAD, Vol. 22, No. 9, pp. 1243-1260, Sep. 2003.
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  • 8
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.