Effects of TiN overlayer on ALD TaCN metal gate/high-k MOSFET characteristics

Device Research Conference - Conference Digest, DRC

Volumn 2005, Issue , 2005, Pages 223-224

  Zhang, Z B ^b   Song, S C ^a   Choi, K ^a   Sim, J H ^a   Majhi, P ^c   Lee, B H ^d  

^a SEMATECH   (United States)

^b TEXAS INSTRUMENTS   (United States)

^c INTEL CORPORATION   (United States)

^d IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATE DIELECTRICS; GATE STACK; INVERSION CAPACITANCE;

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRON MOBILITY; FERMI LEVEL; FIELD EFFECT TRANSISTORS; MOSFET DEVICES;

TITANIUM NITRIDE;

EID: 33751339488     PISSN: 15483770     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DRC.2005.1553130     Document Type: Conference Paper

References (3)

1. L. Chang et al., IEDM Tech. Digest 2000, pp. 719.
2. Z.B. Zhang et al., to be published in VLSI Tech. Digest 2005.
3. K. Choi et al., submitted to APL.