3-D thermal modeling of FinFET

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

Volumn 2005, Issue , 2005, Pages 77-80

  Joshi, R V ^a   Pascual Gutiérrez, José A ^b   Chuang, C T ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FOURIER'S LAW; PHONON BOUNDARY SCATTERING; PHONON CONFINEMENT; THERMAL MODELING;

COMPUTER SIMULATION; HEAT RESISTANCE; HEAT TREATMENT; INTEGRATED CIRCUITS; SEMICONDUCTING SILICON; THIN FILMS;

FIELD EFFECT TRANSISTORS;

EID: 33751207334     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2005.1546589     Document Type: Conference Paper

References (5)

1. H. S. P. Wong et al, IEDM 1998, pp407-410.
2. E. Nowak et al, CICC 2003, pp 339-342.
3. C.A. Colinge, J.P. Colinge, J.T. Park, Proceedings of the IEEE International SOI Conference, pp. 115-116, 2001.
4. R. V. Joshi, Richard Q. Williams, E. Nowak, K. Kirn, J. Beintner, T. Ludwig, I. Aller, C. Chuang, IEEE European Device Research Conf, Sept 2004.
5. J. A. Pascual-Gutiérrez, J. Y. Murthy, R. Viskanta, R. V. Joshi, C. Chuang, 2004 ASME Heat Transfer/Fluids Engineering Summer Conference, July 2004.