Four hardware implementations for the M-ary modular exponentiation

Proceedings - Third International Conference onInformation Technology: New Generations, ITNG 2006

Volumn 2006, Issue , 2006, Pages 210-215

  Nedjah, Nadia ^a   De Mourelle, Luiza Macedo ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DATA PROCESSING; MULTIPLYING CIRCUITS; PUBLIC KEY CRYPTOGRAPHY; SECURITY SYSTEMS;

MODULAR EXPONENTIATIONS; PERFORMANCE FACTORS; PRE-PROCESSING STEPS; TIME REQUIREMENTS;

COMPUTER HARDWARE;

EID: 33750801863     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITNG.2006.65     Document Type: Conference Paper

References (5)

1. Koç, Ç.K., High-speed RSA Implementation, Technical report, RSA Laboratories, Redwood City, CA, USA, November 1994.
2. Montgomery, P.L., Modular Multiplication without Trial Division, Mathematics of Computation 44, pp. 519-521, 1985.
3. th Symposium on Computer Architecture & High-Performance Computing, Brasília, Brazil, pp. 70-75, 2001.
4. th International Conference on Industrial & Engineering Applications of Artificial Intelligence and Expert Systems, Loughborough, England, LNAI 2718, 625-635, 2003.
5. Rivest, R.L., Shamir, A., Adleman, L., A method for obtaining digital signature and public-key cryptosystems, Communication of ACM, vol. 21, no.2, pp. 120-126, 1978.