Pinpointing the side-channel leakage of masked AES hardware implementations

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4249 LNCS, Issue , 2006, Pages 76-90

  Mangard, Stefan ^a   Schramm, Kai ^b  

^a GRAZ UNIVERSITY OF TECHNOLOGY   (Austria)

^b RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

AES; Delay chains; DPA; Glitches; Masking; Zero input DPA; Zero offset DPA

Indexed keywords

COMPUTER CRIME; CONSTRAINT THEORY; LOGIC GATES;

AES; DELAY CHAINS; GLITCHES; MASKING; SIDE-CHANNEL LEAKAGE; ZERO-INPUT DPA; ZERO-OFFSET DPA;

COMPUTER HARDWARE;

EID: 33750700765     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11894063_7     Document Type: Conference Paper

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