A branch and bound algorithm to minimise total weighted tardiness on a single batch processing machine with ready times and incompatible job families

Production Planning and Control

Volumn 17, Issue 7, 2006, Pages 728-741

  Tangudu, S K ^a   Kurz, M E ^a  

^a South   (United States)

Author keywords

Batch processing; Branch and bound; Scheduling; Wafer production

Indexed keywords

BATCH PROCESSING; SINGLE BATCH PROCESSING; WAFER PRODUCTION;

ALGORITHMS; COMPUTATIONAL METHODS; MACHINE DESIGN; OBJECT ORIENTED PROGRAMMING; OPTIMIZATION; PROBLEM SOLVING;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 33750573293     PISSN: 09537287     EISSN: 13665871     Source Type: Journal    
DOI: 10.1080/09537280600901467     Document Type: Article

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