Transimpedance amplifiers using three cascade variable inverter gain stages

Analog Integrated Circuits and Signal Processing

Volumn 49, Issue 3, 2006, Pages 299-302

  Juang, C ^a   Shiue, S F ^a   Tsai, S Y ^a   Yang, J N ^a  

^a MINGHSIN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

OC 3; Transimpedance amplifier

Indexed keywords

BANDWIDTH; LIGHT TRANSMISSION;

INVERTER GAIN STAGES; OC-3; TRANSIMPEDANCE AMPLIFIER;

AMPLIFIERS (ELECTRONIC);

EID: 33750531020     PISSN: 09251030     EISSN: 15731979     Source Type: Journal    
DOI: 10.1007/s10470-006-9706-0     Document Type: Conference Paper

References (4)

1. C.K. Wang and P.C. Huang, "An automatic gain control architecture for SONET OC-3 VLSI." IEEE Trans. Circuits Syst. 11, vol. 44, pp. 779-783, 1997.
2. M. Ingels and M.S.J.T. Steyaert, "A 1-Gb/s 0.7-μm CMOS optical receiver with full rail-to-rail output swing." IEEE J. Solid-State Circuits, vol. 34, pp. 971-977, 1999.
3. T. Yoon and B. Jalali, "1 Gbit/s fiber channel CMOS transimpedance amplifier." Electronics Lett., vol. 33, pp. 588-589, 1997.
4. J.P. Uyemura, Circuit Design for CMOS VLSI. Kluwer Acdemic: Boston, MA, 1992.