Data cache prefetching design space exploration for BlueGene/L supercomputer

Proceedings - Symposium on Computer Architecture and High Performance Computing

Volumn , Issue , 2005, Pages 201-208

  Brunheroto, José R ^a   Salapura, Valentina ^a   Redígolo, Fernando F ^a,b   Hoenicke, Dirk ^a   Gara, Alan ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b UNIVERSITY OF SÃO PAULO   (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

DATA MEMORY ACCESS; DATA STREAMS; MEMORY LATENCY; PREFETCHING SCHEME;

BUFFER STORAGE; COMPUTATION THEORY; COMPUTER ARCHITECTURE; DATA STRUCTURES;

SUPERCOMPUTERS;

EID: 33750413511     PISSN: 15506533     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CAHPC.2005.23     Document Type: Conference Paper

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