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Volumn 5, Issue , 2005, Pages 3244-3248

Biologically plausible VLSI neural network implementation with asynchronous neuron and spike-based synapse

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ENERGY UTILIZATION; VLSI CIRCUITS; VOLTAGE CONTROL;

EID: 33750125702     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2005.1556447     Document Type: Conference Paper
Times cited : (4)

References (17)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.