Tunable wordlength architecture for a low power wireless OFDM demodulator

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E89-A, Issue 10, 2006, Pages 2866-2873

  Yoshizawa, Shingo ^a   Miyanaga, Yoshikazu ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

OFDM; Variable wordlength; VLSI architecture; Wireless communication

Indexed keywords

COMMUNICATION CHANNELS (INFORMATION THEORY); DEMODULATORS; ENERGY DISSIPATION; ERROR ANALYSIS; FADING (RADIO); ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; VECTORS; VLSI CIRCUITS; WIRELESS TELECOMMUNICATION SYSTEMS;

ERROR VECTOR MAGNITUDES (EVMS); MULTIPATH FADING CHANNELS; VARIABLE WORDLENGTH;

COMPUTER ARCHITECTURE;

EID: 33750040017     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1093/ietfec/e89-a.10.2866     Document Type: Conference Paper

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