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Volumn 1, Issue , 2001, Pages 537-544

Data-driven process decomposition for circuit synthesis

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER LENGTH; CIRCUIT SYNTHESIS; DATA DEPENDENCIES; DATA-DRIVEN; HIGH-LEVEL PROGRAM;

EID: 33749618894     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (9)
  • 1
    • 0002927123 scopus 로고
    • Programming in VLSI: From communicating processes to delay-insensitive circuits
    • C.A.R. Hoare, ed., Addison-Wesley, 1990, Addison-Wesley
    • A.J. Martin, "Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits," in C.A.R. Hoare, ed., Developments in Concurrency and Communication, UT Year of Programming Series, pp. 1-64, Addison-Wesley, 1990. Addison-Wesley, 1990.
    • (1990) Developments in Concurrency and Communication, UT Year of Programming Series , pp. 1-64
    • Martin, A.J.1
  • 3
    • 0041693787 scopus 로고
    • Synthesis of self-timed circuits by program transformation
    • G.J. Milne, ed., North-Holland
    • S.M. Burns and A.J. Martin, "Synthesis of Self-Timed Circuits by Program Transformation," In G.J. Milne, ed., The Fusion of Hardware Design and Verification, pp. 99-116, North-Holland, 1988.
    • (1988) The Fusion of Hardware Design and Verification , pp. 99-116
    • Burns, S.M.1    Martin, A.J.2
  • 5
    • 0024942199 scopus 로고
    • Translating concurrent programs into delay-insensitive circuits
    • E. Brunvand and R. Sproull. "Translating Concurrent Programs Into Delay-Insensitive Circuits," Proc. ICCAD, pp. 262-265, 1989.
    • (1989) Proc. ICCAD , pp. 262-265
    • Brunvand, E.1    Sproull, R.2
  • 6
    • 0024126985 scopus 로고
    • Compilation of communicating processes into delay-insensitive circuits
    • C.H. van Berkel and R.W.J.J. Saeijs, "Compilation of Communicating Processes Into Delay-Insensitive Circuits," Proc. ICCD, pp. 157-162, 1988.
    • (1988) Proc. ICCD , pp. 157-162
    • Van Berkel, C.H.1    Saeijs, R.W.J.J.2
  • 7
    • 77956818652 scopus 로고    scopus 로고
    • Data-driven process decomposition for circuit synthesis
    • in preparation
    • C.G. Wong. "Data-Driven Process Decomposition for Circuit Synthesis," Caltech Technical Report, in preparation.
    • Caltech Technical Report
    • Wong, C.G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.