Analysis of limit cycle oscillations in digital current-mode control

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn 2006, Issue , 2006, Pages 480-486

  Chattopadhyay, Souvik ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL CURRENT-MODE CONTROL; DIGITAL PULSE WIDTH MODULATOR (DPWM); INDUCTOR CURRENT;

CLOSED LOOP CONTROL SYSTEMS; COMPUTER SIMULATION; ELECTRIC CURRENT CONTROL; ELECTRIC INDUCTORS; PROBLEM SOLVING; PULSE WIDTH MODULATION;

OSCILLATIONS;

EID: 33749522549     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. B.J. Patella, A. Prodic, A. Zinger, D. Maksimovic, "High-frequency Digital Controller IC for dc/dc Converters", IEEE Applied Power Eleotronios(APEC), Dallas, March 2002,pp.374-380.
2. J. Xiao, AV. Peterohev, S.R. Sanders, "Architecture and IC implementation of a digital VRM controller", IEEE Trans. on Power Electronics, Vol. 18, No. 1, January 2003, pp. 356-364.
3. A.V. Peterchev, S.R. Sanders, "Quantization resolution and limit cycling in digitally controlled PWM converters", IEEE Trans. on Power Electronics, Vol. 18, No.1, January 2003, pp. 301-308.
4. S. Chattopadhyay, S. Das, "A digital current mode control technique for dc-dc converters", IEEE Applied Power Electronics (APEC), APEC 2005, 6-10 March 2005, pp. 885-891.