Design and quantitative analysis of parametrisable eFPGA-architectures for arithmetic

Advances in Radio Science

Volumn 4, Issue , 2006, Pages 251-257

  Neumann, B ^a   Von Sydow, T ^a   Blume, H ^a   Noll, T G ^a  

^a RWTH AACHEN UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; CORRELATORS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN; SIGNAL PROCESSING;

EFFICIENT IMPLEMENTATION; EMERGING PRODUCTS; IMPLEMENTATION COST; INTERCONNECT ARCHITECTURES; INTERCONNECT NETWORKS; REFERENCE ARCHITECTURE; STANDARD ARCHITECTURE; SYSTEMATIC EVALUATION;

NETWORK ARCHITECTURE;

EID: 33748541933     PISSN: 16849965     EISSN: 16849973     Source Type: Journal    
DOI: 10.5194/ars-4-251-2006     Document Type: Article

References (13)

1. Betz, V., Rose, J. and Marquardt, A.: Architecture and CAD for Deep-Submicron FPGAs, Kluwer International Series in Engineering and Computer Science, ISBN 0-7923-8460-1, 1999.
2. Brown, S. and Rose, J.: FPGA and CLPD architectures: A tutorial, IEEE Design and Test of Computers, 13, 42-57, 1996.
3. George, V. and Rabaey, J. M.: Low Energy FPGAs - Architecture and Design, Kluwer International Series in Engineering and Computer Science, 2001.
4. Hauck, S., Fry, T. W., Hosler, M. M., and Kao, J. P.: The Chimaera Reconfigurable Unit, IEEE Trans. on VLSI Systems, 12, 206-217, 2004.
5. Kappen, G. and Noll, T. G.: Application Specific Instruction Processor Based Implementation of a GNSS Receiver on an FPGA, accepted for IEEE DATE, 2006.
6. Kusse, E. and Rabaey, J.: Low-energy embedded FPGA structures, Symp. on Low Power Electronics and Design (IEEE/ACM), 155-160, 1998.
7. Leijten-Nowak, K. and van Meerbergen, J. L.: An FPGA Architecture with Enhanced Datapath Functionality, Proc. FPGA '03, 194-204, 2003.
8. Neumann, B., Blume, H., Feldkämper, H., and Noll, T. G.: Embedded FPGAs für Multimedia-Applikationen, Proceedings ITG-Fachtagung "Elektronische Medien", Dortmund, 147-152, 2003 (in german).
9. Website Altera: http://www.altera.com
10. Website M2000: http://www.m2000.fr
11. Website Xilinx: http://www.xilinx.com
12. Weiss, O., Gansen, M., and Noll, T. G.: A flexible Datapath Generator for Physical Oriented Design, Proceedings ESSCIRC, 408-411, 2001.
13. Ye, A., Rose, J., and Lewis, D.: Architecture of Datapath-Oriented Coarse-Grain Logic and Routing for FPGAs, IEEE CICC, 61-64, 2003.