Utilizing horizontal and vertical parallelism with a no-instruction-set compiler for custom datapaths

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn 2005, Issue , 2005, Pages 69-74

  Reshadi, Mehrdad ^a   Gorjiara, Bita ^a   Gajski, Daniel ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION-SPECIFIC-INSTRUCTION SET-PROCESSORS (ASIP); VERTICAL PARALLELISM;

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; HARDWARE; PARALLEL PROCESSING SYSTEMS; PROGRAM PROCESSORS; SET THEORY;

PROGRAM COMPILERS;

EID: 33748538011     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.112     Document Type: Conference Paper

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