Algorithmic and architectural design methodology for particle filters in hardware

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn 2005, Issue , 2005, Pages 275-280

  Sankaranarayanan, Aswin C ^a   Chellappa, Rama ^a   Srivastava, Ankur ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL BLOCKS; NON-LINEAR STATE EVOLUTION; PARTICLE FILTERS; REAL TIME PROBLEMS;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; MATHEMATICAL MODELS; NAVIGATION; NONLINEAR FILTERING; REAL TIME SYSTEMS; TRACKING (POSITION); VLSI CIRCUITS;

DIGITAL FILTERS;

EID: 33748531835     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.20     Document Type: Conference Paper

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