Optimal wire retiming without binary search

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 9, 2006, Pages 1577-1588

  Lin, Chuan ^a,b   Zhou, Hai ^a,b  

^a IEEE   (United States)

^b Northwestern University   (United States)

Author keywords

Algorithms; Circuit modeling; Circuit optimization; Design methodology; Interconnects; Pipelining; Polynomial complexity; Retiming

Indexed keywords

CIRCUIT MODELING; CIRCUIT OPTIMIZATION; DESIGN METHODOLOGY; INTERCONNECTS; PIPELINING; POLYNOMIAL COMPLEXITY; RETIMING;

ALGORITHMS; CIRCUIT THEORY; OPTIMIZATION; POLYNOMIALS; PROBLEM SOLVING; TIMING CIRCUITS;

ELECTRIC WIRE;

EID: 33748125347     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.858268     Document Type: Article

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