The design & qualification of the TEL CLEAN TRACK ACT™ M photomask coating tool at Intel

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6283 II, Issue , 2006, Pages

  Jamieson, Andrew ^a   Dam, Thuc ^a   Baik, Ki Ho ^a   Duerksen, Ken ^b   Eidson, Elie ^b   Akai, Keiji ^b   Hisano, Kazuya ^c   Kohama, Norifumi ^c   Machidori, Shinichi ^c  

^a INTEL CORPORATION   (United States)

^b TOKYO ELECTRON AMERICA INC   (United States)

^c TOKYO ELECTRON LTD   (Japan)

Author keywords

Coating; Photomask; Resist

Indexed keywords

PHASE-SHIFT COATING PROCESSES; PHOTOMASK; PROCESS DEVELOPMENT; RESIST;

COATING TECHNIQUES; ELECTRONIC EQUIPMENT; LOGIC DESIGN; RELIABILITY;

PHOTOLITHOGRAPHY;

EID: 33748078781     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.681751     Document Type: Conference Paper

References (0)