Quantifying the benefits of cycle time reduction in semiconductor wafer fabrication

IEEE Transactions on Electronics Packaging Manufacturing

Volumn 23, Issue 1, 2000, Pages 3-

  Nemoto, Kazunori ^a   Akcali, Elif ^b   Uzsoy, Reha ^b  

^a HITACHI LTD   (Japan)

^b SCHOOL OF INDUSTRIAL ENGINEERING   (United States)

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EID: 33747829633     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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