A portable parallel algorithm for VLSI circuit extraction

Proceedings of 7th International Parallel Processing Symposium, IPPS 1993

Volumn , Issue , 1993, Pages 434-438

  Ramkumar, B ^a   Banerjee, P ^b  

^a UNIVERSITY OF IOWA   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DATA FLOW ANALYSIS; TIMING CIRCUITS; VLSI CIRCUITS;

CAD APPLICATIONS; CIRCUIT EXTRACTION; COARSE-GRAINED; DATAFLOW EXECUTIONS; OBJECT ORIENTED; PARALLEL CIRCUITS; PARALLEL ENVIRONMENT; PARALLEL MACHINE;

EXTRACTION;

EID: 33747785166     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPPS.1993.262922     Document Type: Conference Paper

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