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Volumn 49, Issue 3, 2006, Pages 355-359

An active methodology for teaching electronic systems design

Author keywords

Electronic design automation (EDA); Field programmable gate array (FPGA); Hardware description language (HDL); Programmable logic devices (PLDs); VHDL language

Indexed keywords

AUTOMATION; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS; SYSTEMS ANALYSIS; TEACHING;

EID: 33747587862     PISSN: 00189359     EISSN: None     Source Type: Journal    
DOI: 10.1109/TE.2006.879247     Document Type: Article
Times cited : (27)

References (15)
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  • 3
    • 33747616081 scopus 로고    scopus 로고
    • "System-on-chip design methodology in engineering education"
    • presented at the Taipei, Taiwan, R.O.C., Aug
    • W. D. Mensch and D. A. Silage, "System-on-chip design methodology in engineering education," presented at the Int. Conf. Engineering Education, Taipei, Taiwan, R.O.C., Aug. 2000.
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    • Mensch, W.D.1    Silage, D.A.2
  • 4
    • 0344395630 scopus 로고    scopus 로고
    • "A semiconductor industry perspective on future directions in ECE education"
    • Nov
    • R. K. Cavin, W. H. Joyner, and V. C. Wiggins, "A semiconductor industry perspective on future directions in ECE education," IEEE Trans. Educ., vol. 46, no. 4, pp. 463-466, Nov. 2003.
    • (2003) IEEE Trans. Educ. , vol.46 , Issue.4 , pp. 463-466
    • Cavin, R.K.1    Joyner, W.H.2    Wiggins, V.C.3
  • 6
    • 33747617019 scopus 로고    scopus 로고
    • "The media as a complement of engineering teaching"
    • presented at the Taipei, Taiwan, R.O.C., Aug
    • A. A. Shiga and C. A. G. Pegollo, "The media as a complement of engineering teaching," presented at the Int. Conf. Engineering Education, Taipei, Taiwan, R.O.C., Aug. 2000.
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    • Shiga, A.A.1    Pegollo, C.A.G.2
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    • "Hiperdocumentos en la enseñanza de la electrónica: Tutoriales, unidades didácticas, test de evaluación y páginas WEB"
    • in Barcelona, Spain, Sep
    • L. Rosado and J. R. Herreros, "Hiperdocumentos en la enseñanza de la electrónica: Tutoriales, unidades didácticas, test de evaluación y páginas WEB," in IV Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica, Barcelona, Spain, Sep. 2000, pp. 249-252.
    • (2000) IV Congreso De Tecnologías Aplicadas a La Enseñanza De La Electrónica , pp. 249-252
    • Rosado, L.1    Herreros, J.R.2
  • 15
    • 0033226076 scopus 로고    scopus 로고
    • "Educational design of high-performance arithmetic circuits on FPGA"
    • Nov. CD Suppl., Paper #12
    • G. Cappuccino, G. Cocorullo, P. Corsonello, and S. Perri, "Educational design of high-performance arithmetic circuits on FPGA," IEEE Trans. Educ., vol. 42, no. 4, Nov. 1999, CD Suppl., Paper #12.
    • (1999) IEEE Trans. Educ. , vol.42 , Issue.4
    • Cappuccino, G.1    Cocorullo, G.2    Corsonello, P.3    Perri, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.