Self-heating in high performance bipolar transistors fabricated on SOI substrates

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 1992-December, Issue , 1992, Pages 417-420

  Ganci, P R ^a   Hajjar, J J J ^a   Clark, T ^a   Humphries, P ^a   Lapham, J ^a   Buss, D ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FABRICATION; SILICON ON INSULATOR TECHNOLOGY; TRANSISTORS;

BURIED OXIDES; MEDICI SIMULATIONS; SILICON SUBSTRATES; SILICON-ON-INSULATOR SUBSTRATES; SOI SUBSTRATES; THERMAL CHARACTERISTICS; THERMAL MODEL; TRANSISTOR CHARACTERISTICS;

SUBSTRATES;

EID: 33747186574     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.1992.307391     Document Type: Conference Paper

References (10)

1. J. P. Colinge, Silicon on Insulator Technology Materials. lQ. YLS. I, (Kluwer Academic Publishers, Boston, MA: 1991), ch. 1.
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4. R. M. Fox and S. G. Lee, Proc IEEE Binolar Circuits and Technology Meeting, p. 89, 1991
5. H. Nishizawa, S. Azuma, T. Yoshitake, K. Yamada, T. Ikeda, H. Masuda and A. Anzai, Proc IEEE Biwlar Circuits and Technology Meeting, p. 53, 1991
6. S. Feindt, J-JJ. Ha. ijar, J. Lapham and D. Buss, IEEE Binolar Circuits and Technology Meeting, 1992 (in print)
7. T. Abe, M. Nakano and T. ltoh, Proc of the 4th International Symnosium on Silicon-on-insulator Technology and. D. N. Schmidt ed., May 1990, Montreal, The Electrochemical Society, NJ.
8. P. C. Munro in the "Simulation and Modeling Department", P. Yang ed., IEEE Circuits & Devices, Vol. 7, No. 3, May 1991.
9. Technology Modeling Associates, Inc., Palo Alto, CA.
10. L. W. Nagel, UCB Memorandum No. ERL-M520, University of California, Berkeley, CA, May 9, 1975.