Dual fixed-point: An efficient alternative to floating-point computation for DSP applications

Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

Volumn 2005, Issue , 2005, Pages 715-716

  Ewe, Chun Te ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33746920518     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515822     Document Type: Conference Paper

References (2)

1. C. T. Ewe, P. Y. K. Cheung, and G. A. Constantinides, "Dual FiXed-Point: An efficient alternative to floating-point computation," in Field Programmable Logic and Application: 14th International Conference, FPL 2004, Leuven, Belgium, August 2004, pp. 200-208.
2. G. A. Constantinides, "High level synthesis and word length optimization of digital signal processing systems," Ph.D. dissertation, Imperial College of Science, Technology and Medicine, University of London, London, U.K., September 2001.