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Volumn 2005, Issue , 2005, Pages 606-611

Integration of a NOC-based multimedia processing platform

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUITS; INTERFACES (COMPUTER); NETWORK PROTOCOLS; RESOURCE ALLOCATION;

EID: 33746913515     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515796     Document Type: Conference Paper
Times cited : (4)

References (10)
  • 1
    • 9544235145 scopus 로고    scopus 로고
    • From buses to networks
    • J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, Eds. Kluwer Academic, ch. 9
    • D. Sigüenza-Tortosa and J. Nurmi, "From buses to networks," in Interconnect-Centric Design for Advanced SoC and NoC, J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, Eds. Kluwer Academic, 2004, ch. 9, pp. 231-251.
    • (2004) Interconnect-centric Design for Advanced SoC and NoC , pp. 231-251
    • Sigüenza-Tortosa, D.1    Nurmi, J.2
  • 2
    • 33746885046 scopus 로고    scopus 로고
    • A brunch from the coffee table - Case study in NoC platform design
    • J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, Eds. Kluwer Academic, ch. 16
    • T. Ahonen et al., "A brunch from the coffee table - case study in NoC platform design," in Interconnect-Centric Design for Advanced SoC and NoC, J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, Eds. Kluwer Academic, 2004, ch. 16, pp. 425-453.
    • (2004) Interconnect-centric Design for Advanced SoC and NoC , pp. 425-453
    • Ahonen, T.1
  • 3
    • 9544251367 scopus 로고    scopus 로고
    • An IP-based on-chip packet-switched network
    • A. Jantsch and H. Tenhunen, Eds. Kluwer Academic, ch. 10
    • I. Saastamoinen, D. Sigüenza-Tortosa, and J. Nurmi, "An IP-based on-chip packet-switched network," in Networks on chip, A. Jantsch and H. Tenhunen, Eds. Kluwer Academic, 2003, ch. 10, pp. 193-213.
    • (2003) Networks on Chip , pp. 193-213
    • Saastamoinen, I.1    Sigüenza-Tortosa, D.2    Nurmi, J.3
  • 7
    • 33746862843 scopus 로고    scopus 로고
    • Tampere University of Technology
    • Institute of Digital and Computer Systems, COFFEE™ RISC Core. Tampere University of Technology, 2005, http://coffee.tut.fi/.
    • (2005) COFFEE™ RISC Core
  • 8
    • 0003533104 scopus 로고    scopus 로고
    • A processor architecture for the TACO protocol processor development framework
    • Turku, Finland, November
    • S. Virtanen, J. Lilius, and T. Westerlund, "A processor architecture for the TACO protocol processor development framework," in Proceedings of the 18th IEEE NORCHIP Conference, Turku, Finland, November 2000, pp. 204-211.
    • (2000) Proceedings of the 18th IEEE NORCHIP Conference , pp. 204-211
    • Virtanen, S.1    Lilius, J.2    Westerlund, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.