메뉴 건너뛰기




Volumn 2005, Issue , 2005, Pages 39-44

Hashing + Memory = low cost, exact pattern matching

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC DOCUMENT IDENTIFICATION SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC GATES; PATTERN MATCHING; POLYNOMIALS;

EID: 33746872588     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515696     Document Type: Conference Paper
Times cited : (41)

References (14)
  • 11
    • 33746910848 scopus 로고    scopus 로고
    • Time and area efficient reconfigurable pattern matching on FPGAs
    • Z. K. Baker and V. K. Prasanna, "Time and area efficient reconfigurable pattern matching on FPGAs," in Proceedings of FPGA '04, 2004.
    • (2004) Proceedings of FPGA '04
    • Baker, Z.K.1    Prasanna, V.K.2
  • 12
    • 0020178736 scopus 로고
    • A hardware hashing scheme in the design of a multiterm string comparator
    • F. J. Burkowski, "A hardware hashing scheme in the design of a multiterm string comparator." IEEE Transactions on Computers, vol. 31, no. 9, pp. 825-834, 1982.
    • (1982) IEEE Transactions on Computers , vol.31 , Issue.9 , pp. 825-834
    • Burkowski, F.J.1
  • 14
    • 85090433665 scopus 로고    scopus 로고
    • Snort - Lightweight intrusion detection for networks
    • November 7-12 Seattle Washington, USA
    • M. Roesch, "Snort - lightweight intrusion detection for networks," in Proceedings of LISA'99: 13th Administration Conference, November 7-12 1999, Seattle Washington, USA.
    • (1999) Proceedings of LISA'99: 13th Administration Conference
    • Roesch, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.