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Volumn 2005, Issue , 2005, Pages 7-12

A reconfigurable instruction memory hierarchy for embedded systems

Author keywords

[No Author keywords available]

Indexed keywords

INSTRUCTION MEMORY HIERARCHY; ON-CHIP STORAGE RESOURCES; SCRATCHPAD MEMORY (SPM);

EID: 33746866751     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515691     Document Type: Conference Paper
Times cited : (6)

References (16)
  • 3
    • 0036045884 scopus 로고    scopus 로고
    • Scratchpad memory: A design alternative for cache on-chip memory in embedded systems
    • May
    • R. Babakar, et. al, "Scratchpad memory: A design alternative for cache on-chip memory in embedded systems," in Proc. 10th Intl. Symp. on Hardware/Software Codesign (CODES'02), May 2002, pp. 73-78.
    • (2002) Proc. 10th Intl. Symp. on Hardware/Software Codesign (CODES'02) , pp. 73-78
    • Babakar, R.1
  • 8
    • 23044524059 scopus 로고    scopus 로고
    • On-chip vs. offchip memory: The data partitioning problem in embedded processor-based systems
    • July
    • P. R. Panda, N. Dutt, and A. Nicolau, "On-chip vs. offchip memory: The data partitioning problem in embedded processor-based systems," ACM Trans, on Design Automation of Elect. Sys., vol. 5, no. 3, pp. 682-704, July 2000.
    • (2000) ACM Trans, on Design Automation of Elect. Sys. , vol.5 , Issue.3 , pp. 682-704
    • Panda, P.R.1    Dutt, N.2    Nicolau, A.3
  • 9
    • 0036053351 scopus 로고    scopus 로고
    • Compiler-directed scratch pad memory hierarchy design and management
    • June
    • M. Kandemir and A. Choudhary, "Compiler-directed scratch pad memory hierarchy design and management," in Proc. 39th Design Automation Conf. (DAC '02), June 2002, pp. 628-633.
    • (2002) Proc. 39th Design Automation Conf. (DAC '02) , pp. 628-633
    • Kandemir, M.1    Choudhary, A.2
  • 13
    • 0031334454 scopus 로고    scopus 로고
    • Procedure placement using temporal ordering information
    • Dec.
    • N. Gloy, et. al., "Procedure placement using temporal ordering information," in Proc. 30th Intl. Symp. on Microarch. (Micro-30), Dec. 1997, pp. 303-313.
    • (1997) Proc. 30th Intl. Symp. on Microarch. (Micro-30) , pp. 303-313
    • Gloy, N.1
  • 14
    • 0033720597 scopus 로고    scopus 로고
    • Hardware-software co-design of embedded reconfigurable architectures
    • June
    • Y. Li, et. al, "Hardware-software co-design of embedded reconfigurable architectures," in Proc. 37th Design Automation Conf. (DAC'00), June 2000, pp. 507-512.
    • (2000) Proc. 37th Design Automation Conf. (DAC'00) , pp. 507-512
    • Li, Y.1
  • 15
    • 0030149507 scopus 로고    scopus 로고
    • CACTI: An enhanced cache access and cycle time model
    • May
    • S. J. E. Wilton and N. P. Jouppi, "CACTI: An enhanced cache access and cycle time model," IEEE Journal of Solid-State Circuits, vol. 31, no. 5, pp. 677-688, May 1996.
    • (1996) IEEE Journal of Solid-state Circuits , vol.31 , Issue.5 , pp. 677-688
    • Wilton, S.J.E.1    Jouppi, N.P.2
  • 16
    • 84858948867 scopus 로고    scopus 로고
    • Y. Han, http://www.ece.neu.edu/groups/nucar/barc2004/BARC2004-yhan.pdf, 2004.
    • (2004)
    • Han, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.