Development of fine circuit pattern formation process using nano-metal ink

SEI Technical Review

Volumn , Issue 62, 2006, Pages 54-57

  Okada, Issei ^a   Shimoda, Kouhei ^b   Miyazaki, Kenji ^a  

^a Electronics and Materials R and D Laboratories   (Japan)

^b Electronics Components Department

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT PATTERN FORMATION; ELECTRO-CHEMICAL REACTION; PHOTOLITHOGRAPHIC ETCHING METHOD; VACUUM SYSTEM;

COATINGS; INK; METALLIC FILMS; NANOSTRUCTURED MATERIALS; PHOTOLITHOGRAPHY; REACTION KINETICS; SYNTHESIS (CHEMICAL);

INTEGRATED CIRCUITS;

EID: 33746642216     PISSN: 13434349     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (7)

1. M. Furusawa, T. Hashimoto, M. Ishida, T. Shimoda, H. Hasei, T. Hirai, H. Kiguchi, H. Aruga, M. Oda, N. Saito, H. Iwashige, N. Abe, S. Fukuta and K. Betsui: SID 02 DIGEST (2002) P.753.
2. N. Tanaka, NIKKEI MICRODEVICES, 59-63 (2005.9)
3. M. Majima, K. Koyama, and S. Inazawa, SEI technical review, 160, 6 (2003)
4. R. Satoh, Y. Iwata, and K. Kintaka, Japan Institute of Electronics Packaging, Vol.8, No.6, 502 (2005)
5. JIS K5600 5-6, Cross-cut test
6. NIKKEI ELECTRONICS, 32-33 (2002.12)
7. NIKKEI ELECTRONICS, 93-103 (2004.6)