VLSI implementation of low-power high-quality color interpolation processor for CCD camera

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 4, 2006, Pages 361-369

  Hsia, Shih Chang ^b   Chen, Ming Huei ^a,b   Tsai, Po Shien ^b  

^a IEEE

^b NATIONAL KAOHSIUNG UNIVERSITY OF APPLIED SCIENCES   (Taiwan)

Author keywords

Camera; Charge coupled device (CCD); Color filter array (CFA); Field programmable gate array (FPGA); Interpolation

Indexed keywords

CAMERAS; CHARGE COUPLED DEVICES; COMPUTATIONAL COMPLEXITY; FIELD PROGRAMMABLE GATE ARRAYS; INTERPOLATION; PROGRAM PROCESSORS; REAL TIME SYSTEMS;

CCD CAMERA; COLOR FILTER ARRAY (CFA); COLOR INTERPOLATION TECHNIQUE; PIPELINE SCHEDULE;

VLSI CIRCUITS;

EID: 33746610662     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.874367     Document Type: Article

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