A framework for high-level synthesis of system-on-chip designs

Proceedings - 2005 IEEE International Conference on Microelectronic Systems Education, MSE '05 - Promoting Excellence and Innovation in Microelectronic Systems Education

Volumn 2005, Issue , 2005, Pages 67-68

  Stine, James E ^a   Grad, Johannes ^a   Castellanos, Ivan ^a   Blank, Jeff ^a   Dave, Vibhuti ^a   Prakash, Mallika ^a   Iliev, Nick ^a   Jachimiec, Nathan ^a  

^a Illinois Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATION TOOLS; CELL LIBRARY; METAL OXIDE SEMICONDUCTOR IMPLEMENTATION SERVICE (MOSIS); SUBMICRON RULES; SYSTEM ON CHIP (SOC);

AUTOMATION; CMOS INTEGRATED CIRCUITS; EDUCATION; PRODUCT DESIGN; TOOLS; VLSI CIRCUITS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 33746163470     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MSE.2005.8     Document Type: Conference Paper

References (4)

1. International Technology Roadmap for Semiconductors. Technical report, Semiconductor Industry Assocation, 2003.
2. J. Gaisler. The Leon-2 Processor. Technical report, Gaisler Research, 2003.
3. J. Grad and J. E. Stine. A Standard Cell Library for Student Projects. In International Conference on Microelectronic Systems Education, pages 98-99. IEEE Computer Society Press, 2003.
4. D. A. Patterson and J. L. Hennessy. Computer Organization and Design: The Hardware/Software Interface. Morgan Kaufmann Publsihers, 2004.