Modular partial reconfiguration in virtex FPGAs

Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

Volumn 2005, Issue , 2005, Pages 211-216

  Sedcole, Pete ^a   Blodget, Brandon ^b   Anderson, James ^b   Lysaght, Patrick ^b   Becker, Tobias ^c  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

^b XILINX INC   (United States)

^c UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTATIONAL GEOMETRY; COMPUTER ARCHITECTURE; MATHEMATICAL MODELS; RESOURCE ALLOCATION;

DYNAMIC PARTIAL RECONFIGURATION; DYNAMIC RECONFIGURATION; MODULAR SYSTEMS; VIRTEX SERIES;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33746036968     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515724     Document Type: Conference Paper

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