Design and implementation of FPGA based high-performance intrusion detection system

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3975 LNCS, Issue , 2006, Pages 724-725

  Kim, Byoung Koo ^a   Heo, Young Jun ^a   Oh, Jin Tae ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER SCIENCE; INSTALLATION; PATTERN RECOGNITION;

HEURISTIC ANALYSIS FUNCTION; HIGH-SPEED NETWORK; NETWORK INTRUSION DETECTION MECHANISM; NETWORK TECHNOLOGY;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33745893778     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11760146_106     Document Type: Conference Paper

References (2)

1. Kruegel, C., Valeur, F., Vigna, G. and Kemmerer, R. "Stateful intrusion detection for high-speed networks", In Proceedings of the IEEE Symposium on Security and Privacy, pp. 266-274, 2002.
2. M. Roesch. "Snort-Lightweight Intrusion Detection for Networks". In Proceedings of the USENIX LISA '99 Conference, November, 1999.