Efficient reachability analysis and refinement checking of timed automata using BDDs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2144, Issue , 2001, Pages 86-91

  Beyer, Dirk ^a  

^a Technical University Cottbus ^*  (Germany)

Author keywords

Formal verification; Real time systems; Timed automata

Indexed keywords

EID: 33745660503     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44798-9_6     Document Type: Conference Paper

References (7)

1. Rajeev Alur and David L. Dill. A theory of timed automata. Theoretical Computer Science, 126:183–235, 1994.
2. Dirk Beyer. Improvements in BDD-based reachability analysis of timed automata. In Proc. FME 2001, LNCS 2021, pages 318–343. Springer-Verlag, 2001.
3. M. Bozga, O. Maler, A. Pnueli, and S. Yovine. Some progress on the symbolic verification of timed automata. In Proc. CAV’97, LNCS 1254, pages 179–190. 1997.
4. Dirk Beyer andAndreas Noack. Efficient verification of timed automata using BDDs. In Proc. Formal Methods for Industrial Critical Systems. to appear, 2001.
5. Dirk Beyer and Heinrich Rust. Modeling a production cell as a distributed real-time system with Cottbus Timed Automata. Proc. FBT’98, pages 148–159. Shaker, 1998.
6. Dirk Beyer and Heinrich Rust. Cottbus Timed Automata: Formal definition and semantics. In Proc. FSCBS 2001, pages 75–87, 2001.
7. David L. Dill, Alan J. Hu, and Howard Wong-Toi. Checking for language inclusion using simulation preorders. In Proc. CAV’91, LNCS 575, pages 255–265. 1992.