Emerging memory technologies - Mainstream or hearsay?

2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)

Volumn 2005, Issue , 2005, Pages 222-228

  Natarajan, Sreedhar ^a   Alvandpour, Atila ^b  

^a Emerging Memory Technologies   (Canada)

^b LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; FLASH MEMORY; INTEGRATED CIRCUIT LAYOUT; NONVOLATILE STORAGE; PROBLEM SOLVING; RANDOM ACCESS STORAGE;

MEMORY DOMINANCE; SILICON DESIGN; SYSTEM ON CHIP (SOC);

STORAGE ALLOCATION (COMPUTER);

EID: 33745457880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VDAT.2005.1500061     Document Type: Conference Paper

References (14)

1. S.Natarajan, Emerging Memory Technologies, CICC 2003 Tutorial
2. Stefan Lai, "Future trends in non-volatile memory technology", IDF, Feb. 2002.
3. Axon Technology Corporation official website at http://www.axontc.com
4. Ashok K. Sharma, Semiconductor Memories: Technology, Testing and Reliability, IEEE Press 1997.
5. Stefan Lai, "Tunnel oxide and ETOX® flash scaling limits", IEEE international non volatile memory technology conference, 1998
6. Embedded Non volatile memories, C.Gopalan.
7. A Survey of Ferroelectric memories: Ali Sheikoleslami, IEEE JSSC, 2001.
8. Emerging Memories, B. Prince, Kluwer Academic publishers
9. Linda Geppert, "The new indelible memories", IEEE Spectrum, March 2003 (49-54).
10. S.Natarajan, Future of Embedded Memories, UC Irvine, CA, Oct 2003
11. Embedded Memories, Short Course, Silicon Nanoelectronics workshop 2003
12. T-RAM website, www.t-ram.com
13. F.Nemati & J.D.Plummer, Highperformance fully and partially depleted poly-Si surrounding gate transistors (Stanford), VLSI Tech. Sym, 1991.
14. Ultra low power embedded ferroelectric memory for SoC, S.Natarajan, A. Alvandpour, SPIE Symposium 2003.