Feasibility study of a novel Moleeular-Pore-Stacking (MPS), SiOCH film in fully-scale-down, 45nm-node Cu damascene interconnects

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2005, Issue , 2005, Pages 18-19

  Tada, M ^a   Ohtake, H ^a   Narihiro, M ^a   Ito, F ^a   Taiji, T ^b   Tohara, M ^b   Motoyama, K ^b   Kasama, Y ^b   Tagami, M ^a   Abe, M ^a   Takeuchi, T ^a   Arai, K ^a   Saito, S ^a   Furutake, N ^a   Onodera, T ^a   Kawahara, J ^c   Kinoshita, K ^c   Hata, N ^d   Kikkawa, T ^d,e   Tsuchiya, Y ^b   Fujii, K ^b   Oda, N ^b   Sekine, M ^b   Hayashi, Y ^a   more..

^a NEC CORPORATION   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

^c MIRAI ASET ^*  (Japan)

^d NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^e HIROSHIMA UNIVERSITY   (Japan)

Author keywords

45nm node Cu; Interconnects; Porous Low k flim

Indexed keywords

45NM-NODE CU; PLASMA -POLYMERIZATION; POROUS LOW-K FLIM;

COPPER; ETCHING; LARGE SCALE SYSTEMS; POLYMERIZATION; POROUS MATERIALS; THIN FILMS;

STACKING FAULTS;

EID: 33745160015     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2005.1469195     Document Type: Conference Paper

References (3)

1. Y. Hayashi, et al., IEEE IITC, p225 (2004).
2. M. Tada. et al., IEEE IEDM Tech. Digest, p845 (2003).
3. W. Steinhogl, et al., Physical Review B 66, 07414 (2002).