0.248μm2 and 0.334μm2 Conventional bulk 6T-SRAM bit -cells for 45nm node low cost - General purpose applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2005, Issue , 2005, Pages 130-131

  Boeuf, F ^a   Arnaud, F ^a   Boccaccio, C ^a   Salvetti, F ^b   Todeschini, J ^b   Pain, L ^d   Jurdit, M ^d   Manakli, S ^a   Icard, B ^d   Planes, N ^a   Gierczynski, N ^b   Denorme, S ^a   Borot, B ^a   Ortolland, C ^b   Duriez, B ^b   Tavel, B ^b   Gouraud, P ^a   Broekaart, M ^b   Dejonghe, V ^b   Brun, P ^d   Guyader, F ^a   Morin, P ^a   Reddy, C ^c   Aminpur, M ^c   Laviron, C ^d   Smith, S ^c   Jacquemin, J P ^b   Mellier, M ^b   Andre F ^a   Bicais Lepinay, N ^a   Jullian, S ^b   Bustos, J ^a   Skotnicki, T ^a   more..

^a STMICROELECTRONICS   (France)

^b NXP SEMICONDUCTORS   (Netherlands)

^c FREESCALE SEMICONDUCTOR INC   (United States)

^d CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COST EFFECTIVENESS; ELECTRODES; ELECTRON BEAMS; GATES (TRANSISTOR); LITHOGRAPHY; POLYSILICON; SILICON COMPOUNDS;

GATE ELECTRODE; POLY-SILICON GATE ELECTRODE; SION GATE OXIDE; SRAM BIT-CELLS;

STATIC RANDOM ACCESS STORAGE;

EID: 33745127020     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2005.1469240     Document Type: Conference Paper

References (9)

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5. D.M. Fried et al., in Tech Digest of IEDM 2004, pp 261-264
6. A. Nackearts et al., in Tech Digest of IEDM 2004, pp269-272
7. F.L. Yang et al., in Digest of Symp. VLSI 2004, pp 8-9
8. A. Shimizu et al., in Tech. Digest of IEDM 2001, pp433-436
9. H. Sayama et al., in Tech. Digest of IEDM 1999, pp625-629