Back-gate controlled READ SRAM with improved stability

Proceedings - IEEE International SOI Conference

Volumn 2005, Issue , 2005, Pages 211-212

  Kim, Jae Joon ^a   Kim, Keunwoo ^a   Chuang, Ching Te ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33744719678     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2005.1563591     Document Type: Conference Paper

References (5)

1. A. Chandrakasan et. al, Design of High-Performance Mircroprocessor Circuits, IEEE Press, pp. 285-308
2. M. Yamaoka et. al, VLSI Symp, pp. 288-291, 2004
3. MEDICI, Synopsis, Inc., 2003.
4. K. Itoh et. al, VLSI Symp, pp. 132-133, 1996
5. J. Fossum et al., IEEE TED, pp.167-170. 2001