Design-for-Iddq-testing for embedded cores based system-on-a-chip

Proceeding - 1998 IEEE International Workshop on IDDQ Testing, IDDQ 1998

Volumn 1998-November, Issue , 1998, Pages 69-73

  Rajsuman, R ^a  

^a Advantest America R and D Center   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP; TEMPERATURE;

DEEP SUB-MICRON TECHNOLOGY; DESIGN FOR TEST; DESIGN METHODOLOGY; EMBEDDED CORES-BASED SYSTEMS; LOW TEMPERATURES; NUMBER OF GATES; SUB-THRESHOLD LEAKAGE; SYSTEM ON A CHIP;

INTEGRATED CIRCUIT DESIGN;

EID: 33744562741     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IDDQ.1998.730769     Document Type: Conference Paper

References (10)

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